The present invention relates to a method of forming a gate electrode, more particularly relates to a method of forming a gate electrode, being capable of oxidizing partially a lower amorphous silicon layer to form a lower polysilicon layer which is more uniform and denser than an upper polysilicon layer.
A gate of a semiconductor is formed by stacking a gate electrode on a gate oxide layer. In order to reduce a concentration of an impurity (for example, phosphorous (P)) on an interface between the gate electrode and the gate oxide layer, in general, the gate electrode is formed with a stack layer consisting of an undoped polysilicon layer and a doped polysilicon layer. At this time, a silicon thin layer, which is in amorphous state, is formed by utilizing silane (SiH4) gas, and the amorphous silicon thin layer is crystallized to form a polysilicon layer through a subsequent thermal process. As a result, the undoped polysilicon layer is obtained. However, in a case where the amorphous silicon layer is crystallized to form the polysilicon layer through the subsequent thermal process, a polysilicon layer having a large grain size is formed.
In recent, as the semiconductor memory device becomes highly integrated, the area of the gate is reduced, there is a difference in the number of grains between the gates. As a result, boundaries of grains are irregularly distributed at the respective gates. During the process, however, a dopant of the polysilicon is diffused to an interface between the gate electrode and the gate oxide layer along the irregular boundary of the grain so that the gate oxide layer is deteriorated. In particular, the dopant is concentrated on a portion at which the grain boundary is in contact with the gate oxide layer so that a difference of electric field is generated. Accordingly, a characteristic of the device is lowered by a threshold voltage distribution characteristic difference between the gates caused by the difference of electric field.